Constant RV_Zcd_lower
Source pub const RV_Zcd_lower: &str = "set = \"RVZcd\" # auto-generated, based on riscv-opcodes 5181d13bef845edfb511e3132a7e661090e3204b (manually added Register_int_c)\nwidth = 32\n\n[formats]\nnames = [\"format-1-0\", \"format-2-0\", \"format-3-0\", \"format-4-0\"]\nparts = [\n [\n \"rd_p_Register_int_c\",\n 3,\n \"Register_int_c\",\n ],\n [\n \"rd_p_Register_float_c\",\n 3,\n \"Register_float_c\",\n ],\n [\n \"rs1_p_Register_int_c\",\n 3,\n \"Register_int_c\",\n ],\n [\n \"rs1_p_Register_float_c\",\n 3,\n \"Register_float_c\",\n ],\n [\n \"rd_Register_int\",\n 5,\n \"Register_int\",\n ],\n [\n \"rd_Register_float\",\n 5,\n \"Register_float\",\n ],\n [\n \"rs2_p_Register_int_c\",\n 3,\n \"Register_int_c\",\n ],\n [\n \"rs2_p_Register_float_c\",\n 3,\n \"Register_float_c\",\n ],\n [\n \"c_rs2_Register_int\",\n 5,\n \"Register_int\",\n ],\n [\n \"c_rs2_Register_float\",\n 5,\n \"Register_float\",\n ],\n [\n \"none\",\n 32,\n \"u32\",\n ],\n [\n \"imm\",\n 32,\n \"VInt\",\n ],\n [\n \"himm\",\n 32,\n \"VInt\",\n \"hex\",\n ],\n]\n\n[types]\nnames = [\"type-1-0\", \"type-2-0\", \"type-3-0\", \"type-4-0\"]\n[[types.type-1-0]]\nname = \"none\"\ntop = 31\nbot = 13\n\n[[types.type-1-0]]\nname = \"himm\"\ntop = 5\nbot = 3\n\n[[types.type-1-0]]\nname = \"rs1_p_Register_int_c\"\ntop = 2\nbot = 0\n\n[[types.type-1-0]]\nname = \"himm\"\ntop = 7\nbot = 6\n\n[[types.type-1-0]]\nname = \"rd_p_Register_float_c\"\ntop = 2\nbot = 0\n\n[[types.type-1-0]]\nname = \"none\"\ntop = 1\nbot = 0\n\n[[types.type-2-0]]\nname = \"none\"\ntop = 31\nbot = 13\n\n[[types.type-2-0]]\nname = \"himm\"\ntop = 5\nbot = 5\n\n[[types.type-2-0]]\nname = \"rd_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-2-0]]\nname = \"himm\"\ntop = 4\nbot = 3\n\n[[types.type-2-0]]\nname = \"himm\"\ntop = 8\nbot = 6\n\n[[types.type-2-0]]\nname = \"none\"\ntop = 1\nbot = 0\n\n[[types.type-3-0]]\nname = \"none\"\ntop = 31\nbot = 13\n\n[[types.type-3-0]]\nname = \"himm\"\ntop = 5\nbot = 3\n\n[[types.type-3-0]]\nname = \"rs1_p_Register_int_c\"\ntop = 2\nbot = 0\n\n[[types.type-3-0]]\nname = \"himm\"\ntop = 7\nbot = 6\n\n[[types.type-3-0]]\nname = \"rs2_p_Register_float_c\"\ntop = 2\nbot = 0\n\n[[types.type-3-0]]\nname = \"none\"\ntop = 1\nbot = 0\n\n[[types.type-4-0]]\nname = \"none\"\ntop = 31\nbot = 13\n\n[[types.type-4-0]]\nname = \"himm\"\ntop = 5\nbot = 3\n\n[[types.type-4-0]]\nname = \"himm\"\ntop = 8\nbot = 6\n\n[[types.type-4-0]]\nname = \"c_rs2_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-4-0]]\nname = \"none\"\ntop = 1\nbot = 0\n\n[format-1-0]\ntype = \"type-1-0\"\n\n[format-2-0]\ntype = \"type-2-0\"\n\n[format-3-0]\ntype = \"type-3-0\"\n\n[format-4-0]\ntype = \"type-4-0\"\n\n[mappings]\nnames = [\"Register_int\", \"Register_int_c\", \"Register_float\", \"Register_float_c\"]\nnumber = 32\nRegister_int = [\n \"zero\",\n \"ra\",\n \"sp\",\n \"gp\",\n \"tp\",\n \"t0\",\n \"t1\",\n \"t2\",\n \"s0\",\n \"s1\",\n \"a0\",\n \"a1\",\n \"a2\",\n \"a3\",\n \"a4\",\n \"a5\",\n \"a6\",\n \"a7\",\n \"s2\",\n \"s3\",\n \"s4\",\n \"s5\",\n \"s6\",\n \"s7\",\n \"s8\",\n \"s9\",\n \"s10\",\n \"s11\",\n \"t3\",\n \"t4\",\n \"t5\",\n \"t6\",\n]\nRegister_int_c = [\"s0\", \"s1\", \"a0\", \"a1\", \"a2\", \"a3\", \"a4\", \"a5\"]\nRegister_float = [\n \"ft0\",\n \"ft1\",\n \"ft2\",\n \"ft3\",\n \"ft4\",\n \"ft5\",\n \"ft6\",\n \"ft7\",\n \"fs0\",\n \"fs1\",\n \"fa0\",\n \"fa1\",\n \"fa2\",\n \"fa3\",\n \"fa4\",\n \"fa5\",\n \"fa6\",\n \"fa7\",\n \"fs2\",\n \"fs3\",\n \"fs4\",\n \"fs5\",\n \"fs6\",\n \"fs7\",\n \"fs8\",\n \"fs9\",\n \"fs10\",\n \"fs11\",\n \"ft8\",\n \"ft9\",\n \"ft10\",\n \"ft11\",\n]\nRegister_float_c = [\"fs0\", \"fs1\", \"fa0\", \"fa1\", \"fa2\", \"fa3\", \"fa4\", \"fa5\"]\n\n[format-1-0.repr]\ndefault = \"$name$ %rd_p_Register_float_c%, %himm%(%rs1_p_Register_int_c%)\"\n\n[format-2-0.repr]\ndefault = \"$name$ %rd_Register_float%, %himm%(sp)\"\n\n[format-3-0.repr]\ndefault = \"$name$ %rs2_p_Register_float_c%, %himm%(%rs1_p_Register_int_c%)\"\n\n[format-4-0.repr]\ndefault = \"$name$ %c_rs2_Register_float%, %himm%(sp)\"\n\n[format-1-0.instructions.\"c.fld\"]\nmask = 0xe003\nmatch = 0x2000\nunsigned = true\n\n[format-2-0.instructions.\"c.fldsp\"]\nmask = 0xe003\nmatch = 0x2002\nunsigned = true\n\n[format-3-0.instructions.\"c.fsd\"]\nmask = 0xe003\nmatch = 0xa000\nunsigned = true\n\n[format-4-0.instructions.\"c.fsdsp\"]\nmask = 0xe003\nmatch = 0xa002\nunsigned = true\n";