Constant RV64_Zfa
Source pub const RV64_Zfa: &str = "set = \"RV64Zfa\" # auto-generated, based on riscv-opcodes 5181d13bef845edfb511e3132a7e661090e3204b\nwidth = 32\n\n[formats]\nnames = [\"format-1-1\", \"format-1-2\", \"format-2-3\", \"format-2-7\", \"format-3-3\"]\nparts = [\n [\n \"rd_Register_int\",\n 5,\n \"Register_int\",\n ],\n [\n \"rd_Register_float\",\n 5,\n \"Register_float\",\n ],\n [\n \"rs1_Register_int\",\n 5,\n \"Register_int\",\n ],\n [\n \"rs1_Register_float\",\n 5,\n \"Register_float\",\n ],\n [\n \"rs2_Register_int\",\n 5,\n \"Register_int\",\n ],\n [\n \"rs2_Register_float\",\n 5,\n \"Register_float\",\n ],\n [\n \"rm\",\n 3,\n \"Mapping_round\",\n ],\n [\n \"none\",\n 32,\n \"u32\",\n ],\n [\n \"imm\",\n 32,\n \"VInt\",\n ],\n [\n \"himm\",\n 32,\n \"VInt\",\n \"hex\",\n ],\n [\n \"lval\",\n 5,\n \"Mapping_vals\",\n ],\n]\n\n[types]\nnames = [\"type-1-1\", \"type-1-2\", \"type-2-3\", \"type-2-7\", \"type-3-3\"]\n[[types.type-1-1]]\nname = \"none\"\ntop = 31\nbot = 20\n\n[[types.type-1-1]]\nname = \"rs1_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-1-1]]\nname = \"none\"\ntop = 14\nbot = 12\n\n[[types.type-1-1]]\nname = \"rd_Register_int\"\ntop = 4\nbot = 0\n\n[[types.type-1-1]]\nname = \"none\"\ntop = 6\nbot = 0\n\n[[types.type-1-2]]\nname = \"none\"\ntop = 31\nbot = 20\n\n[[types.type-1-2]]\nname = \"lval\"\ntop = 4\nbot = 0\n\n[[types.type-1-2]]\nname = \"none\"\ntop = 14\nbot = 12\n\n[[types.type-1-2]]\nname = \"rd_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-1-2]]\nname = \"none\"\ntop = 6\nbot = 0\n\n[[types.type-2-3]]\nname = \"none\"\ntop = 31\nbot = 25\n\n[[types.type-2-3]]\nname = \"rs2_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-2-3]]\nname = \"rs1_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-2-3]]\nname = \"none\"\ntop = 14\nbot = 12\n\n[[types.type-2-3]]\nname = \"rd_Register_int\"\ntop = 4\nbot = 0\n\n[[types.type-2-3]]\nname = \"none\"\ntop = 6\nbot = 0\n\n[[types.type-2-7]]\nname = \"none\"\ntop = 31\nbot = 25\n\n[[types.type-2-7]]\nname = \"rs2_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-2-7]]\nname = \"rs1_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-2-7]]\nname = \"none\"\ntop = 14\nbot = 12\n\n[[types.type-2-7]]\nname = \"rd_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-2-7]]\nname = \"none\"\ntop = 6\nbot = 0\n\n[[types.type-3-3]]\nname = \"none\"\ntop = 31\nbot = 20\n\n[[types.type-3-3]]\nname = \"rs1_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-3-3]]\nname = \"rm\"\ntop = 2\nbot = 0\n\n[[types.type-3-3]]\nname = \"rd_Register_float\"\ntop = 4\nbot = 0\n\n[[types.type-3-3]]\nname = \"none\"\ntop = 6\nbot = 0\n\n[format-1-1]\ntype = \"type-1-1\"\n\n[format-1-2]\ntype = \"type-1-2\"\n\n[format-2-3]\ntype = \"type-2-3\"\n\n[format-2-7]\ntype = \"type-2-7\"\n\n[format-3-3]\ntype = \"type-3-3\"\n\n[mappings]\nnames = [\"Register_int\", \"Register_float\", \"Mapping_round\", \"Mapping_vals\"]\nnumber = 32\nRegister_int = [\n \"zero\",\n \"ra\",\n \"sp\",\n \"gp\",\n \"tp\",\n \"t0\",\n \"t1\",\n \"t2\",\n \"s0\",\n \"s1\",\n \"a0\",\n \"a1\",\n \"a2\",\n \"a3\",\n \"a4\",\n \"a5\",\n \"a6\",\n \"a7\",\n \"s2\",\n \"s3\",\n \"s4\",\n \"s5\",\n \"s6\",\n \"s7\",\n \"s8\",\n \"s9\",\n \"s10\",\n \"s11\",\n \"t3\",\n \"t4\",\n \"t5\",\n \"t6\",\n]\nRegister_float = [\n \"ft0\",\n \"ft1\",\n \"ft2\",\n \"ft3\",\n \"ft4\",\n \"ft5\",\n \"ft6\",\n \"ft7\",\n \"fs0\",\n \"fs1\",\n \"fa0\",\n \"fa1\",\n \"fa2\",\n \"fa3\",\n \"fa4\",\n \"fa5\",\n \"fa6\",\n \"fa7\",\n \"fs2\",\n \"fs3\",\n \"fs4\",\n \"fs5\",\n \"fs6\",\n \"fs7\",\n \"fs8\",\n \"fs9\",\n \"fs10\",\n \"fs11\",\n \"ft8\",\n \"ft9\",\n \"ft10\",\n \"ft11\",\n]\nMapping_round = [\"rne\", \"rtz\", \"rdn\", \"rup\", \"rmm\", \"unknown\", \"unknown\", \"dyn\"]\nMapping_vals = [\n \"-1.0\",\n \"min\",\n \"2.0e-16\",\n \"2.0e-15\",\n \"2.0e-8\",\n \"2.0e-7\",\n \"0.0625\",\n \"0.125\",\n \"0.25\",\n \"0.3125\",\n \"0.375\",\n \"0.4375\",\n \"0.5\",\n \"0.625\",\n \"0.75\",\n \"0.875\",\n \"1.0\",\n \"1.25\",\n \"1.5\",\n \"1.75\",\n \"2.0\",\n \"2.5\",\n \"3.0\",\n \"4.0\",\n \"8.0\",\n \"16.0\",\n \"128.0\",\n \"256.0\",\n \"32768.0\",\n \"65536.0\",\n \"inf\",\n \"nan\",\n]\n\n[format-1-2.repr]\ndefault = \"$name$ %rd_Register_float%, %lval%\"\n\n[format-1-1.repr]\ndefault = \"$name$ %rd_Register_int%, %rs1_Register_float%, rtz\"\n\n[format-2-3.repr]\ndefault = \"$name$ %rd_Register_int%, %rs1_Register_float%, %rs2_Register_float%\"\n\n[format-2-7.repr]\ndefault = \"$name$ %rd_Register_float%, %rs1_Register_float%, %rs2_Register_float%\"\n\n[format-3-3.repr]\ndefault = \"$name$ %rd_Register_float%, %rs1_Register_float%, %rm%\"\n\n[format-1-1.instructions.\"fcvtmod.w.d\"]\nmask = 0xfff0707f\nmatch = 0xc2801053\n\n[format-1-2.instructions.\"fli.d\"]\nmask = 0xfff0707f\nmatch = 0xf2100053\n\n[format-1-2.instructions.\"fli.h\"]\nmask = 0xfff0707f\nmatch = 0xf4100053\n\n[format-2-3.instructions.\"fleq.d\"]\nmask = 0xfe00707f\nmatch = 0xa2004053\n\n[format-2-3.instructions.\"fleq.h\"]\nmask = 0xfe00707f\nmatch = 0xa4004053\n\n[format-2-3.instructions.\"fltq.d\"]\nmask = 0xfe00707f\nmatch = 0xa2005053\n\n[format-2-3.instructions.\"fltq.h\"]\nmask = 0xfe00707f\nmatch = 0xa4005053\n\n[format-2-7.instructions.\"fmaxm.d\"]\nmask = 0xfe00707f\nmatch = 0x2a003053\n\n[format-2-7.instructions.\"fmaxm.h\"]\nmask = 0xfe00707f\nmatch = 0x2c003053\n\n[format-2-7.instructions.\"fminm.d\"]\nmask = 0xfe00707f\nmatch = 0x2a002053\n\n[format-2-7.instructions.\"fminm.h\"]\nmask = 0xfe00707f\nmatch = 0x2c002053\n\n[format-3-3.instructions.\"fround.d\"]\nmask = 0xfff0007f\nmatch = 0x42400053\n\n[format-3-3.instructions.\"fround.h\"]\nmask = 0xfff0007f\nmatch = 0x44400053\n\n[format-3-3.instructions.\"froundnx.d\"]\nmask = 0xfff0007f\nmatch = 0x42500053\n\n[format-3-3.instructions.\"froundnx.h\"]\nmask = 0xfff0007f\nmatch = 0x44500053\n";